Boise, Idaho - April 20, 2007 American Semiconductor, Inc. (ASI) announced today the completion of a significant technology development milestone for Flexfet™ SOI CMOS technology. ASI process installation at their San Jose contract manufacturing site has been demonstrated with full functional CMOS fabricated in the highly innovative Flexfet advanced Independent Double Gated SOI CMOS process technology. This accomplishment enables the next steps in the full commercialization of Flexfet for ASI's current Military/Aerospace markets and long-term general commercial markets.
"We now have our on-shore fabrication capacity positioned to fully demonstrate Flexfet double gate benefits such as ultra-low-power, extreme environment reliability, and low cost from the exciting new dynamic threshold control provided by this process technology" states Doug Hackler, ASI President and CEO.
Boise, Idaho. March 12 2007 American Semiconductor, Inc. (ASI) announced today the completion of a significant technology development milestone for Flexfet™ SOI CMOS technology. ASI process installation at their fabrication facility SVTC has been demonstrated with full functional CMOS transistors fabricated in the highly innovative Flexfet advanced Independent Double Gated SOI CMOS process technology. This accomplishment enables the next steps in the full commercialization of Flexfet for ASI's current Military/Aerospace markets and long-term general commercial markets.
"We are now positioned to fully demonstrate Flexfet technology benefits such as ultra-low-power, inherent radiation-tolerance, and low cost along with an exciting new industry capability - dynamic threshold control" states Doug Hackler, ASI President and CEO
"With this major milestone achieved, we are able to pursue rapid market acceptance of ASI's new CMOS process that can provide solutions to a number of current industry challenges" state Mike Scott, Vice President of Sales for ASI. "The ASI team is very excited regarding this technology development and is eager to provide these capabilities to our customers."
Boise, Idaho - January 07, 2007 American Semiconductor, Inc. (ASI) of Boise, Idaho announced in January 2007 that they have completed a major expansion to their operations driven by a significant increase in government contracts awards, and overall commercial business in 2006. This expansion entails an approximate doubling of total operations footprint in Boise, Idaho, which includes newly added Test Clean Room Facilities and Advanced Integrated Circuit Test capabilities, along with increased Engineering and Sales Operations office space.
In addition, ASI continues their productization of Flexfet™ AS180FF - ASI's proprietary Independent Double Gated 180nm SOI CMOS technology. This independent double gated planar process allows previously not available capabilities such as ultra-low-power circuits using dynamic threshold control and dynamic reconfigurability to maximize Power and Speed (at the same time), permitting Deep Sleep & Turbo modes. Customer prototyping is currently underway and ASI's Multi-Project Run schedule is on target to be initiated in 2H07.
American Semiconductor, Inc. Awarded Key U.S. Patent in the area of Independent Double Gated Process Development
Boise, Idaho. --(Business Wire)-- January 04, 2007 -- American Semiconductor, Inc. today announced that it has been awarded its 5th U.S. Patent for a Double Gated Transistor Circuit related to ASI's advanced SOI CMOS technology from the United States Patent and Trademark Office. Achieving this additional significant milestone further demonstrates the depth and breadth of American Semiconductor's achievements in the area of advanced SOI CMOS wafer fabrication process design, development, and manufacturing.
This patent titled "DOUBLE GATED TRANSISTOR CIRCUIT" details a unique transistor architecture as related to ASI's Flexfet™ Advanced SOI technology development efforts. The patent inventors from ASI are Doug Hackler, President and Founder, of Boise, and Dr. Stephen Park of Nampa. This DOUBLE GATED TRANSISTOR CIRCUIT is the most fundamental building block of the Flexfet Independent Double Gated SOI CMOS technology that enables superior solutions for low-power, RF, and analog/Mixed Signal integrated circuits. This independent double gated planar transistor allows previously not available capabilities such as ultra-low-power circuits using dynamic threshold control and dynamic reconfigurability to maximize Power and Speed (at the same time), permitting Deep Sleep & Turbo modes.
"Receiving this patent award is extremely satisfying and confirms our technology leadership position in Process Development," remarked Doug Hackler, president and CEO of American Semiconductor, Inc. "This important milestone is a great testament to the innovation, dedication, and vision of the company's design and engineering team."
"We are very excited with this step in our technology and company's growth, and have high expectations of subsequent IP and business development" stated Mr. Hackler.
American Semiconductor, Inc. Awarded First U.S. Patent in the area of Advanced Semiconductor Process Development
Boise, Idaho. --(Business Wire)-- August 15, 2005 -- American Semiconductor, Inc. today announced that it has been awarded its first patent related to its independent double-gated advance SOI technology from the United States Patent and Trademark Office. Achieving this significant milestone demonstrates the depth and breadth of American Semiconductor's advancements in the area of advanced SOI wafer fabrication process design, development, and manufacturing. This first patent titled "SRAM CELL" details a unique transistor architecture as related to ASI's Flexfet™ Advanced SOI technology development efforts. The patent inventors from ASI are Doug Hackler, President and Founder, of Boise, Dr. Stephen Park of Nampa, and Kelly DeGregorio of Boise. This SRAM Cell is one of the fundamental building blocks of the Flexfet Advanced SOI technology that enables superior solutions for low-power, RF, and analog/Mixed Signal integrated circuits. This technology further resolves CMOS technology limitations for next generation scaling of advanced microelectronics. "Receiving this patent award is extremely satisfying and confirms our technology leadership position in Process Development," said Doug Hackler, president and CEO of American Semiconductor, Inc. "This important milestone is a great testament to the innovation, dedication, and vision of the company's design and engineering team." "We are very excited with this step in our technology and company's growth, and have high expectations of subsequent IP and business development" stated Mr. Hackler.
Boise, Idaho -- April 15, 2005 The Air Force Research Lab (AFRL) has awarded American Semiconductor Inc., a foundry for wafer fabrication and advanced process development, a SBIR Phase I contract to develop a Commercial Rad-Hard Advanced Digital Library (CRADL) to support new designs for satellites and other spacecraft utilizing ASI's advanced double gated SOI AS180FF Flexfet™ CMOS technology. This SBIR Phase I will result in a digital cell library to be used for designs with key advantages for both military and commercial applications. The advantages include higher performance, lower power, lower mask and wafer costs and effective mitigating of radiation effects in harsh environments. American Semiconductor, Inc. proposes the use of Flexfet CMOS technology for the Digital Cells to enable next generation high-altitude and space microelectronic components for operations and missions demanding high density, low power, and high speed. These cells will have commercially viability and will be of significant commercial interest to Foundry customers in many market segments. American Semiconductor, Inc. will provide for the future and present digital cell library requirements to support space system designs for AFRL and other agencies with applications that need high performance, low power, low cost, and high reliability.
Boise, ID -- January 21, 2005 American Semiconductor, Inc, a foundry for wafer fabrication and advanced process development, has been awarded a Phase I SBIR from NASA for the development of a Rad-hard Reconfigurable Bi-directional Level Shifters technology. This technology named ReBiLS (Reconfigurable Bi-directional Level Shifter) will allow satellites and other spacecraft the ability to integrate logic signals across multiple generations of microelectronic components. American Semiconductor, Inc. will focus this SBIR to present an environmentally robust reconfigurable bi-directional level shifters design, with bi-directional operation to permit two way communications between systems for the purpose of integration of current and future systems. This design supports the integration of multiple generations of components by enabling compatibility between advanced 0.5V microelectronics and older generation 5.0V components. The new design will allow systems the ability to communicate and function together utilizing a longer life span for current and future space-bound equipment. Benefits will also include a high speed, low power, sub-lithographic process utilization. This will significantly improve the integration of components from different technology generations and facilitate bridging the gap between many legacy stand alone systems and updated higher performance devices.
Cypress's SVTC Enables American Semiconductor to Develop Advanced SOI CMOS Process. Process Delivers Independent Double-Gate Performance and Submicron Manufacturing Capability
SAN JOSE, Calif. --(BUSINESS WIRE)-- April 13, 2005 --Silicon Valley Technology Center (SVTC), a division of Cypress Semiconductor Corp. (NYSE:CY - News), and American Semiconductor, Inc. (ASI), today announced that ASI will be using SVTC's R&D manufacturing services to commercialize its Flexfet™ advanced Silicon-on-Insulator (SOI) CMOS wafer fabrication process for manufacturing. ASI, a fabless semiconductor company that develops and commercializes process technology, is avoiding significant capital investment by using SVTC's 65-nm capable, 200- and 300-mm R&D wafer fab, to develop and qualify its process technology. "By perfecting our technology at SVTC, ASI is able to resolve fundamental limitations of CMOS for next-generation scaling of advanced microelectronics," said Doug Hackler, founder and president of ASI. "We are also able to cost-effectively move our business forward and more aggressively pursue and support our customer base." Flexfet is a new process that supports a variety of technologies, such as novel dielectrics, metal gate materials, 3D and MEMS integration, all beyond the scope of standard CMOS capabilities. The process provides a significant advancement in dynamic threshold control that reduces the scaling barriers associated with power. It is also RF-capable, inherently resistant to radiation and allows low power operations well below one volt. "As R&D costs continue to rise, companies with emerging technology development needs, capital equipment manufacturers and materials suppliers are challenged to cost-effectively migrate their products and processes from prototype to manufacturability," said Bert Bruggeman, SVTC's managing director. "Our work with ASI is an example of how to overcome those challenges and allows ASI to realize a significant R&D cost savings while rapidly commercializing its advanced process technology." SVTC's 200-mm wafer fab will support ASI's immediate demand for the Flexfet offering and prototype production is booked for Summer 2005. Production volumes are forecast to be manufactured at Cypress's Bloomington, Minn.-based Fab IV facility. SVTC is also supporting ASI's requirements to scale the initial 0.18 micron offering to 0.13-micron, 90-nm and beyond. Cypress's SVTC enables third-party engineering groups to take products from proof-of-concept to manufacturing through a state-of-the-art toolset in a 16,000 square-foot clean room in Silicon Valley. Customers are also able to tap more than 20 years of process development expertise. SVTC offers best practices in fab process engineering, statistical process control, quality management, failure analysis, and design for manufacturing methodologies as part of its development toolbox."
August 26, 2004 - A new Boise company believes it has developed a technology and process that will help the semiconductor industry save billions of dollars in new equipment.
That's a lofty claim for a start-up with no manufacturing facility, a staff of seven and minimal funding. But American Semiconductor is slowly gaining the attention of a wide spectrum of believers, from the U.S. Missile Defense Agency to UC Berkeley.
The August edition of Inside Chips.com, a Web-based analysis service of semiconductor startups, featured American Semiconductor and had this to say about the Boise start-up: "Launching a pure-play semiconductor foundry is not something one sees every day, but we expect American will be able to carve out a niche that differentiates it from other SOI (silicon-on-insulator) providers. While American is quite small, the company has deep expertise in semiconductor manufacturing and process technologies and has developed a unique technology that we believe will help usher SOI into the mainstream. We perceive the company's business plan as one that — initially, anyway — will allow it to co-exist with mammoth competitors such as IBM and Motorola instead of competing with them."
BOISE, Idaho --(BUSINESS WIRE)-- Aug. 2, 2004 --American Semiconductor, Inc., a pure-play foundry provider for Flexfet™ SOI CMOS fabrication and advanced custom process development, is realizing a significant increase in custom process fabrication demand for on-shore U.S. manufacturing. "We are seeing a significant increase in the number of requests for custom process development and fabrication from both large and small customers," states Doug Hackler, American Semiconductor President and CEO. There is a sizable market segment that is being underserved and constraining new product/business development both in the U.S. and abroad due to the lack of foundry services for prototype and low-volume custom processing. American Semiconductor's business model supports low-volume custom R&D and fabrication which is an enabling service for technology industry growth. Many of these projects do not fit into the business model of typical foundry operations; however, they fit well within the custom process capability at American Semi. Custom capability includes advanced process modeling to optimize first prototype results for low-cost proof-of-concept. American Semi maintains relationships with a wide range of development labs to provide extensive custom capability and processes can be transferred to production fabrication sites. American Semiconductor is currently expanding both of these manufacturing capabilities due to the increase in custom job requests. "We continue to focus on our new advanced Flexfet SOI CMOS process capability and its transfer into production; however, the custom process services product line is providing a great opportunity to meet customers' needs for new technology development."
March 6, 2004, Big Sky, MT Dr. Stephen Parke presented "Comparison of Existing & Proposed SOI MOSFET Device Structures for Minimizing Total Dose Radiation Damage" and highlighted the significant advantages of Flexfet SOI CMOS for these issues.
January 30, 2004 Doug Hackler, President and CEO presented the new technology in detail for the first time at the IEEE Microelectronics Reliability and Quality Workshop in Manhatten Beach, CA.
January 6, 2003 The U. S. Air Force Research Lab has awarded the new "High-k Dielectric Research for the Development of High Performance, Compact Capacitors for Pulse Forming" to American Semiconductor, Inc. The research will develop applied technology in high-k dielectric materials to demonstrate substantial improvement in capacity, voltage breakdown and dissipation factor in advanced capacitor prototypes. Pulse power capacitors are an enabling technology for future weapon systems and high-k material performance is a key technology requirement for future semiconductor devices such as the next generation Flexfet™ SOI.
November 19, 2002 The Missile Defense Agency has selected American Semiconductor's proposal "Foundry Flexfet™ SOI, a Commercial Revolution in Rad-Hard Processing" for funding in 2003. This research project will develop an advanced ultra-low-power, rad-hard, process and buttress U.S. competitiveness in domestic microelectronics production.
March 24, 2002 Today, the Ballistic Missile Defense Agency (BMDO, Dept of Defense) selected the American Semiconductor SBIR Phase I proposal, "Novel Multilayer MIM Damascene Capacitor", for funding. A committee of government scientists, engineers, and technical managers recommended it as a promising approach for MDA. This proposal competed with over 1,000 proposals in the FY02 MDA SBIR soliciation.