Frequently Asked Questions
- What products does American Semiconductor offer?
- Does American Semiconductor offer MPW (Multi Project Wafers)?
- Does American Semiconductor do custom processing?
- How much does a wafer lot cost?
- Does American Semiconductor meet ITAR requirements?
- What is American Semiconductor's ticker symbol?
- What process technology is American Semiconductor capable of running?
- What wafer size do you run?
- What is your minimum lot size?
- Does American Semiconductor have copper BEOL?
- What is SOI?
- What is a MIGFET?
- What is a MUGFET?
- Why does your 45nm process use 1D/grated layout?
- What is Mask-Lite™?
- What do you mean when you say AS045BK is economically viable for R&D and low volume?
- What do you mean when you say AS045BK is available for custom process requirements and/or technology development?
- What is Flexfet?
- Is Flexfet a MIGFET?
- Is Flexfet a MUGFET?
- What is Dynamic Threshold Control?
- What is Ultra Low Power?
- Why is low voltage important to ULP?
- How does Flexfet achieve ULP?
- What kind of power savings can I expect with Flexfet ULP?
- Why is Flexfet ULP better than other approaches, such as voltage scaling?
- How is Flexfet radiation tolerant?
- What is the benefit of the gate last process?
- Can Flexfet be used to build imagers and other detectors?
- Is Flexfet supported with PDKs (Process Development Kits)?
- What is FleX?
- Does FleX result in flexible die or flexible wafers?
- Do the FleX wafers work as good as full-thickness or traditionally thinned wafers?
- Are FleX wafers durable?
- Do FleX die work when deformed?
- Does FleX allow post thinning fab processing?
- Can you FleX a Flexfet wafer?
- Can you FleX other SOI wafers?
- How do you make a FleX wafer so thin and flexible?
- What is Custom Fabrication?
- How do I install my process into your fab?
- Can I develop custom process with American Semiconductor?
- Can I integrate novel materials and processes with American Semiconductor?
- What is Copy Smart?
- What is Copy Exact?
- Which is better, Copy Smart or Copy Exact?
- What experience does the design team have?
- What is your design flow?
- Can you design with processes other than American Semiconductor's Flexfet?
- What IP do you have for other foundry processes?
- Can you provide a system development platform for my micro-controller?
- What design services are available?
General FAQs
Q. What products does American Semiconductor offer?
A. We are a pure-play foundry. Our foundry products are silicon wafers and design support
for our customers. We also offer design services for any foundry service, even outside
foundries. FleX Silicon-On-Polymer may be applied to wafers fabricated by us or by
outside foundries.
Q. Does American Semiconductor offer MPW (Multi Project Wafers)?
A. Yes. Follow the link for MPW Program Details.
Q. Does American Semiconductor do custom processing?
A. Yes. More information can be found at
Custom Fabrication
or Custom Fabrication FAQs.
Q. How much does a wafer lot cost?
A. That depends on a variety of factors, including process node, standard or
custom process, number of metal layers, and such. Please
contact us for pricing.
Q. Does American Semiconductor meet ITAR requirements?
A. Yes. American Semiconductor is ITAR registered and can support ITAR programs for
design and fabrication.
Q. What is American Semiconductor's ticker symbol?
A. We are a privately held company and therefore do not have a ticker symbol.
General FAQ Category Index Top of Page
Technology FAQs
Q. What process technology is American Semiconductor capable of running?
A. Flexfet is currently available at 130nm and 180nm. We are currently ehnahcing our
45nm bulk CMOS process and have demonstrated capability for more advanced process nodes.
Q. What wafer size do you run?
A. 200mm.
Q. What is your minimum lot size?
A. 12 wafers.
Q. Does American Semiconductor have copper BEOL?
A. Yes, we have copper available for multiple processes.
Q. What is SOI?
A. Silicon-on-Insulator wafers.
Q. What is a MIGFET?
A. MIGFET stands for Multiple Independent Gate Field Effect Transistor. Traditional
CMOS processes use single gates. MIGFETs have multiple gate surfaces and provide
independent control of each gate. Vertical structures, such as FinFET, have been
shown conceptually and demonstrated in low volume R&D processes in MIGFET
configurations. Flexfet is a more mature MIGFET technology and available for
prototype production.
Q. What is a MUGFET?
A. MUGFET stands for MUltiple Gate Field Effect Transistor. MUGFETS have multiple
gate surfaces but only have a single gate electrode. FinFET is an example of
a MUGFET. Flexfet can be configured as a MUGFET using Double Gated (DG) mode.
Technology FAQ Category Index Top of Page
45nm / AS045BK FAQs
Why does your 45nm process use 1D/grated layout?
A. We use 1D/grated as part of our Mask-Lite™ technology to drastically reduce mask costs.
What is Mask-Lite™?
A. At about 130nm standard 2D layout runs into lithography issues where what is drawn is not what
is printed. These lithography issues are correctable but require more complex design rules and
OPC (Optical Proximity Correction), which drives up mask costs. At about 65nm even more complex
and expensive corrections may be required, with further drives up cost. Mask-Lite leverages
fixed pitches and straight lines, along with some other proprietary techniques, to reduce the
complexity of making masks. This drives down costs and provides savings we pass along to our
customers.
Q. What do you mean when you say AS045BK is economically viable for R&D and
low volume?
A. All 45nm foundry process can be justified economically with a high enough volume. But
R&D production or applications that do not drive tens or hundreds of million units may not
be able to justify the high startup costs with 45nm processes. Mask-Lite directly reduces costs
as described in the previous question. The same factors that allow us to reduce mask costs
enable a simpler set of design rules. This allows design teams to focus on their design rather
than wading through hundreds of pages of design documents or suffering weeks of DRC issues. AS045BK
simplifies the design process and drives a more efficient design cycle. Additionally, we support
low cost design tools such as Silvaco and Incentia, further reducing the cost of using our
technology. By driving these costs down, we reduce the barrier to entry for designing in 45nm.
Q. What do you mean when you say AS045BK is available for custom process requirements
and/or technology development?
A. For the majority of users, 45nm foundries are unwilling to run anything but their defined
processes. Exceptions exist, but the bar for getting a process modified is generally very
high. American Semiconductor is different. We enjoy working with our customers to define and
install process modifications or even undertake technology development to make our process work
better for your requirements.
45nm / AS045BK FAQ Category Index Top of Page
Flexfet FAQs
Q. What is Flexfet?
A. Flexfet is an advanced CMOS process characterized by an Independently Double Gated
transistor. The novel design of the Flexfet transistor brings many benefits not
realized in standard CMOS processes. Flexfet enables Dynamic Threshold Control
(DTC), enabling threshold voltage (Vt) to be controlled on-the-fly. Additionally,
Flexfet enables Ultra Low Power (ULP) operation, with Flexfet ULP running at or
below 0.5V, fully depleted. Learn more on the Flexfet page.
Q. Is Flexfet a MIGFET?
A. Yes. Flexfet CMOS is characterized by an Independently Double Gated (IDG)
transistor. Flexfet is a true MIGFET. See the MIGFET topic in the
Technology FAQs.
Q. Is Flexfet a MUGFET?
A. Yes. In Double Gated (DG) mode, Flexfet's top and bottom gates are tied
together. In DG mode Flexfet is a MUGFET. See the MUGFET topic in the
Technology FAQs
Q. What is Dynamic Threshold Control?
A. Dynamic Threshold Control (DTC) enables threshold voltage (Vt) to be controlled
on-the-fly. DTC allows the same IC to be optimized for speed, operating
power, and standby power as the system requires. DTC can be used at various levels of
a design - at the transistor, circuit, or chip level.
Q. What is Ultra Low Power?
A. Ultra Low Power (ULP) is the quest of many electronics systems. The benefits
depend on the system. For example, battery powered applications can run longer
between recharges, and performance systems generate less
heat, reducing or eliminating cooling needs and improving reliability. ULP is
generally achieved by reducing voltage.
Q. Why is low voltage important to ULP?
A. This is answered by looking at the CMOS power equation:
P = f * C * V^2,
where P=power, f=frequency, C=capacitance, and V=voltage
Since voltage is squared, it has the greatest impact on power.
Q. How does Flexfet achieve ULP?
A. As noted in the question above, voltage reduction is the single most significant
influence on power. Flexfet enables deep sub-volt circuits, down to 0.25V on the
180nm Flexfet process (August 2009 results).
Q. What kind of power savings can I expect with Flexfet ULP?
A. That is hard to answer here. It really depends on where your starting point is,
and can vary based on design practices. However, an accepted rule of thumb is
that for every 10% decrease in voltage, a 30% decrease in power could be expected.
Q. Why is Flexfet ULP better than other approaches, such as voltage scaling?
A. Flexfet supports both independently double-gated operation for dynamic power
control and double-gated operation for steeper subthreshold slope and better
performance at low voltage. These capabilities are not available in standard CMOS
processes.
Q. How is Flexfet radiation tolerant?
A. Flexfet is an SOI (Silicon-On-Insulator) process. SOI is inherently immune to
Single Event Latchup (SEL). The ultra-thin SOI silicon of Flexfet reduces the
collection area for charged particles and therefore dramatically improves SEE
performance including reduction in Single Event Upset (SEU) and Single Event Transients
(SET). Standard SOI transistors do have problems
with TID (Total Ionizing Dose) due to charge trapped in the BOX (Buried Oxide).
Flexfet's Independently Double Gated design mitigates TID effects since the bottom
gate effectively shields the channel from trapped charge in the
BOX.
Q. What is the benefit of the gate last process?
A. Flexfet's gate last process enables the use of temperature sensitive gate
dielectrics, metal gates, and novel materials that have low thermal budgets.
Q. Can Flexfet be used to build imagers and other detectors?
A. Yes. Diodes built in the substrate typically require a large bias applied to
the substrate. Detectors allow charge collection from high-energy particles
passing through the substrate. The Flexfet process allows large substrate biases
without performance degradation. Additionally, Flexfet is unaffected by the
associated radiation-induced trapped charge in the BOX. Flexfet enables Monolithic
Active Pixel Sensors (MAPS) by allowing logic and devices on the same die
as the detector, reducing system cost and improving performance.
Q. Is Flexfet supported with PDKs (Process Development Kits)?
A. Yes. Flexfet is supported with both PDPs (Preliminary Design Packages) and PDKs.
See the Flexfet page for PDP and PDK status.
Flexfet FAQ Category Index Top of Page
FleX FAQs
Q. What is FleX?
A. FleX Silicon-on-Polymer is a process that transfers the circuitry of a standard
SOI CMOS wafer to a flexible substrate and removes the handle silicon. The FleX
process yields high performance CMOS on fully functional flexible wafers.
Q. Does FleX result in flexible die or flexible wafers?
A. The FleX process results in full 200mm wafer on a flexible substrate. Die
can be singulated from the flexible wafer.
Q. Do the FleX wafers work as good as full-thickness or traditionally
thinned wafers?
A. Yes. Testing has shown that some electrical characteristics actually get
better after the FleX process.
Q. Are FleX wafers durable?
A. Yes. FleX wafers have endured extensive handling, including several cycles
of deforming the wafers/die with no detrimental effects.
Q. Do FleX die work when deformed?
A. Yes. The FleX page shows a video where a die is wrapped around a pencil
and placed under a probe card.
Q. Does FleX allow post thinning fab processing?
A. Yes. Many processes can be applied to a FleX wafer post thinning.
Q. Can you FleX a Flexfet wafer?
A. Yes. Many Flexfet wafers have been through the FleX process with excellent results.
Q. Can you FleX other SOI wafers?
A. Yes. The FleX process can be applied to wafers fabricated elsewhere. Some design
considerations must be taken into account to make a wafer that works well when the FleX
process is applied, so contact us before finalizing your design.
Q. How do you make a FleX wafer so thin and flexible?
A. You didn't really think we would answer that?
FleX FAQ Category Index Top of Page
Custom Fabrication FAQs
Q. What is Custom Fabrication?
A. Custom fabrication is our ability to put your existing process/product into our
fab or create a custom process/product specific to your needs.
Q. How do I install my process into your fab?
A. Through Copy Smart or Copy Exact methodologies. Typically a Copy Smart
methodology is used. Transferred processes are often from smaller wafer sizes
and older technology capabilities. We will apply enhancements based on 200mm
processing and current technology best practices. We will use our proven process
flows and incorporate our advanced capabilities and best practices to improve
yields and drive cost reductions.
Q. Can I develop custom process with American Semiconductor?
A. Yes. We will develop process steps, modules or flows to meet your
product/process design and performance requirements.
Q. Can I integrate novel materials and processes with American Semiconductor?
A. Yes. However, contamination and best practice requirements must be met.
Q. What is Copy Smart?
A. Copy Smart is a methodology to transfer existing products/processes into our
fab. Copy Smart utilizes existing process flows when possible, but also incorporates
improvements for current technology and best practices. When transferring from
older lines, improvements will be made for 200mm processing.
Q. What is Copy Exact?
A. Copy Exact is a methodology to transfer existing products/processes into our
fab. Copy Exact utilizes existing process flows exactly as they were run
previously.
Q. Which is better, Copy Smart or Copy Exact?
A. It depends on the situation. Copy Exact is useful when the same tools and
processes are available and no change in the product or process is desired. Copy
Smart is useful when applying product or process improvements, or when migrating
to more advanced technologies or larger wafer sizes.
Custom Fabrication FAQ Category Index Top of Page
Design Services FAQs
Q. What experience does the design team have?
Each member of the design has significant experience in the semiconductor
industry; several members with more than 20 years experience. Areas of expertise
include design, verification, physical layout, validation and applications of
micro-controllers and custom ASICs.
Q. What is your design flow?
A. A flow using RTL to gate to physical layout is our standard digital design
flow. Analog and mixed signal designs are developed separately and modeled for
use during chip development and verification.
Q. Can you design with processes other than American Semiconductor's
Flexfet?
A. Yes. The team has extensive experience working with third party foundries
such as Freescale, Tower/Jazz, UMC and TSMC.
Q. What IP do you have for other foundry processes?
A. It depends on the foundry and process. Using Freescale's SmartMOS10W as an example,
we have compiled SRAMs and ROMs, Antifuse blocks, precision oscillators, USB PHY, bandgap
references, ADCs, and embedded microcontrollers. For a complete listing, see the
Design Services section
Q. Can you provide a system development platform for my micro-controller?
A. Yes. If desired, an early software development platform using an FPGA can be
developed for your design. Additionally, a system development board can be developed
with specific peripherals for your application along with board support reference
software.
Q. What design services are available?
A. Our capabilities support a full turnkey solution, covering:
- foundry selection
- IP creation, acquisition, and integration
- design
- verification
- silicon validation and development boards
- FPGA emulation
- test
You can leverage any or all of these capabilities for your needs.
Custom Fabrication FAQ Category Index Top of Page