Flexfet™

A Better Kind of CMOS

Flexfet is an advanced CMOS process characterized by an Independently Double Gated transistor. The novel design of the Flexfet transistor brings many benefits not realized in standard CMOS processes. Flexfet enables Dynamic Threshold Control (DTC), enabling Vt to be controlled on-the-fly. Additionally, Flexfet enables Ultra Low Power operation, running at as little as 0.5V, fully depleted. Flexfet is a gate-last process, which enables integration of novel materials with low thermal budgets. The unique IDG design and SOI processing of Flexfet create an inherent radiation tolerance, which is extremely useful in avionics and space systems. Flexfet is commercially available as a foundry process from American Semiconductor with standard Process Development Kits available for 180nm and 130nm nodes, and the Radiation Effects Process Development Kit (RE-PDK) developed with support from Air Force Research Labs SHARE program.

Flexfet Diagram

Flexfet Status

• Flexfet 180nm CMOS

  • Pre-production process
  • Currently released for prototype and engineering product builds
  • Preliminary Design Package (PDP) and Process Development Kit (PDK) available
  • Technology Readiness Level (TRL) 6
    • Transistor and parametric testing completed at wafer and package levels
    • Flexfet 180nm is a good candidate to support advanced IC experiments at TRL1 to TRL6
  • Multilayer metal options available
  • Integrated detector options available

• Flexfet 130nm CMOS

  • Currently in process for initial research
  • Preliminary Design Package (PDP) available
  • Technology Readiness Level (TRL) 4
    • Flexfet 130nm offered for research programs at TRL1 to TRL4
  • Multilayer metal options available

Flexfet is Advanced CMOS Technology that enables cutting edge designs

Logic

• Dynamic Threshold Control (DTC) for on-the-fly optimization of power and performance
• Ultra Low Power (ULP) voltage ranges available down to 0.5V without using subthreshold design
• DTC for active compensation of extreme temperature, supply voltage, process variation, and dose accumulation effects

Imagers / Detectors

• Supports integration of Flexfet CMOS with detector diodes in the substrate
• JFET bottom gate shields the Flexfet CMOS from the effects of voltages applied to the substrate

Memory

• Non-volatile memory integrating new dielectrics via Flexfet gate-last process

Analog / Mixed Signal

• Opportunities for lowering analog and mixed signal voltages
• Utilize Flexfet transistor isolation, low noise, low power, and Dynamic Threshold Control